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General Information

HOT CHIPS 11 (1999)
Date August 15-17, 1999
PlaceMemorial Auditorium, Stanford University
Program Final Program PDF
Committees Not Available

Tutorials

TutorialsSunday, August 15, 1999
Morning Tutorial
08:30-12:00
Digital Signal Processing
Chair: Teresa Meng

Video Algorithms and Architectures, Dr. Kees A. Vissers (Philips Research) PDF

Signal Processing in Communications I: xDSL, Dr. Sam Sheng (DataPath Systems) PDF

Signal Processing in Communications II: CDMA, Dr. Sam Sheng (DataPath Systems) PDF

Afternoon Tutorial
13:30-17:00
IA64 Architecture and Compilers
Chair: Ken Shoemaker

IA-64 Architecture Basics/Introduction, Dr. Allan Knies (Intel) PDF

Optimization Techniques/Using IA-64 Features, Dr. Allan Knies (Intel) PDF

Compiler Technology on IA-64, Dr. Jesse Fang (Intel) PDF

Conference Day One

SessionMonday, August 16, 1999
Opening Remarks
08:45-09:00
General Chair: Michael Blasgen
Program Co-Chairs: Forest Baskett, Monica Lam
Session 1
09:00-10:30
Parallel Machines
Chair: John Kubiatowitz

A Multi-Threaded 64-bit PowerPC Commercial RISC Processor Design, S. Storino, J. Borkenhagen (IBM) PDF

A RISC Processor for SR8000: Accelerating Large Scale Scientific Computing with SMP, Y. Tamaki, T. Kurihara, K. Shimada, E. Kamada, T. Shimizu (Hitachi) PDF

The Stanford Hydra CMP, L. Hammond, B. Hubbert, M. Siu, M. Prabhu, M. Willey, M. Chen, M. Kozyrczak, K. Olukotun (Stanford University) PDF

Session 2
11:00-12:30
New Technology
Chair: Peter Hsu

A 1GHz Power4 Testchip Design , B. McCredie, J. Badar, R. Bailey, P. Chou, C. Carter, D. Ervin, M. Floyd, J. Keaty, B. Krauter, J. LeBlanc, L. Leitner, D. Mikan, Jr., M. Nealon, J. Petrovick, K. Reick, P. Restle, T. Skergan, H. Stogdon, J. Vargus, J.D. Warnock (IBM) PDF

A Synchronous Wave-Pipeline Interface, E. Cordero, D. Dreps, F. Ferraiolo, M. Floyd, K. Gower, B McCredie (IBM) PDF

A Field-Sequential Color 1040 by 768 Liquid Crystal on Silicon Display, Michael Bolotski (The MicroDisplay Corporation) PDF

Keynote 1
13:40-14:40
Chair: Mitsuo Saito

New Millenium for Computer Entertainment, Ken Kutaragi, President (Sony Computer Entertainment) PDF

Session 3
15:00-16:30
Graphics Processors
Chair: Henry Moreton

5.5 GFLOPS Vector Units for Emotion Synthesis, A. Kunimatsu, N. Ide, T. Sato, Y. Endo, H. Murakami, T. Kamei, M. Hirano, M. Oka, A. Ophba, T. Yutaka, T. Okada, M. Suzuoki (System ULSI Engineering Laboratory of the Toshiba Corporation, Sony Computer Entertainment) PDF

Massively Parallel SIMD Computing on a Single Chip, R. McConnell (PixelFusion) PDF

MAP1000A: a 5w, 230 MHz VLIW Mediaprocessor, J.O’Donnell (Equator) PDF

Session 4
17:00-18:30
Embedded Machines
Chair: Howard Sachs

High Speed Low Cost TM1300 Trimedia Enhanced PCI VLIW Mediaprocessor, L. Lucas (Philips Semiconductors) PDF

The ARM9TDMI and ARM9ESP Synthesizable Families, A. Burdass (ARM) PDF

Configurable/Extensible Processors Change System Design, R. Gonzalez (Tensilica) PDF

Panel Discussion
19:45-21:00
Information Appliances in the Home
Moderators: Norm Jouppi and Ken Shoemaker

Panelists:
David Armitage, President (Qubit)
Jim Barton , CTO (TiVo)
Natasha Flaherty, Market Manager, Asia (Phone.com)
Elizabeth Houck (Philips Research)

Conference Day Two

SessionTuesday, August 17, 1999
Session 5
08:30-10:30
PC and Special-purpose Chips
Chair: Gert Slavenburg

IGR4-A High Performance AMD K7 Northbridge w/ RDRAM Memory Controller, C. Keltcher, J. Kelly, R. Krishnan, J. Peck, S. Polzin, S. Subramanian, F. Weber (AMD) PDF

High-Performance Sort Chip, S. Azuma, T. Sakuma, T. Nakano, T. Ando. K. Shirai (Mitsubishi) PDF

The vg500 Real-Time Ray-Casting ASIC, H. Pfister (Mitsubishi Electric Research Laboratory) PDF

Session 6
11:00-12:30
Software
Chair: Marc Tremblay

Virtual Platform-A Virtual Machine Monitor for a Commodity PC, M. Rosenblum (Vmware) PDF

Wiggins/Redstone-An On-line Program Specializer, R. Gordon (Compaq) PDF

Hardware Support for Out of Order Instruction Profiling on Alpha 21264a, J. Anderson, L. Berc, J. Dean, S. Ghemawat, S. Leung, M. Litchenberg, M. Vandevoorde, G. Verns, C. Waldspurger, W. Weihl, J. White (Compaq) PDF

Keynote 2
13:40-14:40
Chair: John Hennessy

Broadband Communications IC’s for High-Speed Networking in the Home, Henry Samueli, Co-Chairman and Chief Technical Officer (Broadcom) PDF

Session 7
15:00-16:30
Network Chips
Chair: Earl Killian

The Epigram EPI41210/EPI41100 16bps Home Phoneline Networking Chipset, A. Corry, G. Efland, E. Frank, N. Ferrario, H. Garlapati, R. Hayes, J. Holloway, H. Kuo, J. Laudon, T. Mallory, W. Morton, G. Loyola, N. Nucklos, J. Pattin, H. Ptasinski, K. Peterson, E. Ojard, D. Snow, W. Stafford, T. Robinson, J. Trachewsky, L. Yamano, C. Young, C. Warth, R. Alva, B. Bunch, D. Fifield, N. Castagnoli, M. Dove, M. Kobayashi, R. McCauley, S. Mohapatra, T. Moorti, A.Siddeqee, W. Shieh, S. Siener (Epigram) PDF

Broadcom BCM5600 StrataSwitch:A Highly Integrated Ethernet Switch On A Chip, A. Essen and James Mannos (Broadcom Corporation) PDF

SiRFstar II Architecture: A Powerful System Platform for Consumer GPS Application, G. Turetzky, J. Knight, R. Tso, L. Peng (SiRF Technology) PDF

Session 8
17:00-18:30
Instruction Sets
Chair: Alan Smith

An Architecture Extension for Efficient Geometry Processing, R. Thekkath (MIPS Technologies) PDF

An Architecture for the New Millenium, M. Tremblay (Sun Microsystems) PDF

The Internet Streaming SIMD Extensions, S. Thakker (Intel) PDF


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