HOT CHIPS 6 Archives (1994)
General Information
Tutorials
| Tutorials |
Sunday, August 14, 1994 |
Morning Tutorial
08:30-12:00 |
Algorithms and Hardware for Video Compression
Chair: Teresa H. Meng, Stanford University
|
Afternoon Tutorial
13:00-16:30 |
Instruction-Set Extensions for Multiprocessor Interconnects
Chair: David V. James, Apple Computer, Inc.
|
Conference Day One
| Session |
Monday, August 9, 1994 |
Opening Remarks
09:00-9:15 |
General Chair: John Mashey 
Program Co-Chairs: Don Alpart, Alan Jay Smith  |
Session 1
09:15-10:45 |
CPUs (Part 1)
Chair: Norman P. Jouppi, DEC WRL
An Overview of the 21164 Alpha AXP Microprocessor, John Edmondson, Paul Rubinfeld (Digital Equipment Corp) 
The Power2+ Processor, David Shippy (IBM) 
A 500MHz 32b 0.4um CMOS RISC Processor (Gallop), Kazumasa Suzuki (NEC)  |
Session 2
11:15-12:45 |
Multiprocessors and Encryption
Chair: Howard Sachs, Sun Microsystems
The Alewife CMMU: Addressing the Multiprocessor Communications Gap, John Kubiatowicz (MIT) 
nCube3 Integrated MPP Node Processor, Robert Duzett (nCube) 
A 100Kbit/sec Single Chip: Modular Exponentiation Processor, Holger Orup (Aarhus University, Denmark)  |
Session 3
14:15-15:45 |
Networks, Communication
Chair: Forest Baskett, Silicon Graphics
UAI2110: A Universal GaAs ATM Interface Chip for High Speed Networks, Premysl Vaclavik (Thomas Neuroth GmbH, Austria) 
A 500MHz BICOM GByte/Second SCI-Link Implementation, Wayne Nation (IBM) 
The STC104 Asynchronous Packet Switch, Peter Thompson (INMOS Ltd.) 
|
Session 4
16:30-17:30 |
CPUs (Part 2)
Chair: Don Alpert, Intel Corporation
The New I960 CPU That Offers More for Less, The P100, Richard Brunner, Delf Atallah (Intel) 
SH-II: A Low Power RISC Micro for Consumer Applications, Shumpei Kawasaki (Hitatchi)  |
Panel Discussion
19:15-21:30 |
The Investor (Venture) Community View of What's Hot
Moderators: Forest Baskett, Silicon Graphics
Panelists:
Cliff Friedman (Bear Steams)
Stephen Shapiro (Tiger Management)
Peter Thomas (Institutional Venture Partners)
|
Conference Day Two
| Session |
Tuesday, August 16, 1994 |
Session 5
09:00-10:00 |
Chipsets
Chair: Allen Baum, Apple Computer, Inc.
82430NX PCIset: Companion to the Highest Performance Pentium Processor, Patrick Correia (Intel) 
A Power PC/PCI Bridge Chip with a Cache and Memory Controller, Karl Wang (Motorola) 
|
Session 6
10:30-12:30 |
Graphics
Chair: Ruby Lee, Hewlett-Packard
An ASIC for Interactive 3D Graphics, Stephanie Winner (Apple Computer)
GLiNT - A 3D Graphics Processor Based on the OpenGL Standard, Neil Trevett (3Dlabs)
The Smart Frame Buffer Goes Hollywood: 3D and TV, Joel McCormack (Digital Equipment Corp)
A Cached VRAM for 3D Graphics, Michael Deering (Sun Microsystems) |
Session 7
14:00-15:30 |
Video
Chair: Anoop Gupta, Stanford University
Video Compression Processor for H.320-to-Indeo Transcoding, Bryan Martin (Integrated Information Technology)
A High Performance Programmable Multistadard Video Compression Chip Set, David Still (Array Microsystems)
Multimedia Enhancements for PA-RISC Processors, Ruby Lee (Hewlett-Packard) |
Session 8
16:00-17:00 |
CPUs (Part 3)
Chair: Alan J. Smith, University of California, Berkeley
PowerPC 604, Marvin Denman (Motorola) 
The Thunder SPARC Processor, Bruce Lightner (Metaflow Technologies) 
The Superscalar Hardware Architecture of the MC68060, Joe Circello (Motorola) 
A High Performance, Low Power, Pentium Processor, Doug Carmean, Lawrence Clark, Robert Rozploch (Intel) |