This tutorial concerns the design of integrated systems characterized by a (wireline and/or wireless) network connection. Such an 'antenna-to-network' systems incorporates an RF front end, baseband DSP, link layer coding and medium access control functions. A major challenge in the design of these systems is meeting the system performance with the lowest area, cost, and power. However there exists a gap between the system engineering and integrated circuits implementation that has limited the degree of optimization one could do from the system level down to circuit level implementations.

The tutorial focuses on top-down design approaches and techniques that help to bridge this gap, In particular, we consider system and arcitectural issues that are specific to the design of single-chip wireless systems. The goal of this tutorial is to present a systems perspective of design optimization for networked systems with focus on power management and energy efficiency. The tutorial will address system, architectural, neworking and hardware approaches that have a direct impact on power consumption. We will explore various levels of power management schemes and how coordinated approaches are being explored for efficient energy utilization of system needs in the context of 802.11b and Bluetooth standards.

Rajesh Gupta (Ph.D. Stanford, M.S. UC Berkeley) is a professor of Information and Computer Sciences at UC irvine. He has authored or co-authored over 100 articles on various aspects of microelectronic design/CAD. At UCI, he leads an effort on Adaptive Memory System Architectures and co-leads an effort on Compiler-Controlled Power/Peformance Management; Gupta serves as editor-in-chief of IEEE Design and Test and on the editorial boards of IEEE Transactions on CAD and IEEE Transactions on Mobile Computing. He was a distinguished Lecturer for the ACM/SIGDA and the IEEE Circuits and Systems Society for 2000-2001