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HOT
Chips 14 brings together designers and architects of high-performance chips,
software, and systems. Presentations focus on up-to-the-minute real developments.
This symposium is the primary forum for engineers and researchers to highlight
their leading-edge designs. Three full days of tutorials and technical sessions
will keep you on top of the industry.
Sunday, August 18
Morning Tutorial
| 8:30 am - 12:00 pm | Chair: Keith Diefendorff
IC
Technology Scaling Trends, Challenges, & Potential Solutions through
2016
Peter M. Zeitzoff, Dr. Alfred K. Wong, Dr. Michael E. Thomas
Sematech International, Univ. of Hong Kong, Honeywell Electronic Materials
description
LUNCH
| 12:00 pm - 1:00 pm
Afternoon
Tutorial
| 1:30 pm - 5:00 pm| Chair: Pradeep Dubey
Low
Power Wireless Networked System Design
Rajesh K. Gupta
Center for Embedded Computer Systems, UC Irvine
description
Wine & Cheese
Reception | 5:00 pm - 6:00 pm
Monday, August 19
Opening
Remarks | 8:20 am - 8:30 am
General Chair: Amr Zaky | Program Co-Chairs: John Wawrzynek, Keith Diefendorff
SESSION
1 | Intel Microprocessors
| 8:30 am - 10:00 am | Chair: John Shen
•
McKinley Processor
- San Soltis, Hewlett-Packard
- Cameron McNairy, Intel
• An Analysis of the CPU2K Benchmarks on the McKinley Processor
- James McCormick, Hewlett Packard
- Allan D. Knies, Intel
• Intel® Netburst™ Microarchitecture and Hyper-Threading
Technology
- Debbie Marr, Intel
BREAK
| 10:00 am - 10:30 am
KEYNOTE
| Eric Schmidt CTO, Google | 10:30 am - 11:20
am
Always On: Always Aware. Net Life 2005.
description
SESSION
2 | Network Processors
| 11:20 am - 12:20 pm | Chair: Siamak Arya
• Benchmark Performance: IBM PowerNP NP4GS3 Network
Processor
- Nathan Pham, IBM
• Challenges in Making Highly Integrated Network Processors
- Keith Morris, AMCC
LUNCH
| 12:20 pm - 1:30 pm
SESSION
3 | Interconnects | 1:30
pm - 3:00 pm | Chair: Marc Tremblay
• A
20Gb/s 0.13um CMOS Serial Link
- Patrick Chiang, William J. Dally, Ming-Ju Edward Lee, Stanford University
• Smarter Interconnects for Smarter Chips
- Scott Evans, John Ivie, Michael J. Meyer, Geert Rosseel, Jay Tomlinson,
Wolf-Dietrich Weber, Drew Wingard, Sonics Inc.
• JIO : High Performance I/O & Graphics For UltraSPARC IIIi-based Systems
- Bikram Saha, Sun Microsystems
BREAK
| 3:00 pm - 3:30 pm
SESSION
4
| Technology | 3:30 pm - 5:00 pm | Chair:
Hidetaka Magoshi
• Integrated
Cryptographic Hardware Engines on the zSeries Microprocessor
- Jeffrey A. Magee, Thomas S. Fuchs, Seth R. Greenspan, Thomas Koehler,
Bernd Nerz, Timothy J. Slegel, IBM Corporation
• How a processor can permute n bits in O(1) cycles
- Ruby Lee, et al., Princeton University
• CMOS Crossbar
- Ting Wu, Chi-Ying Tsui, Mounir Hamdi, Hong Kong University of Science
& Technology
BREAK
| 5:00 pm - 5:30 pm
SESSION
5 | Systems on Chip I
| 5:30 pm - 6:30 pm | Chair: Tom Riordan
•
The RM9000 Family of Integrated Multiprocessor Devices
- Paul C. Cobb, PMC-Sierra
• Alchemy Au1x00
- Paul Bassett, AMD
DINNER
| 6:30 pm - 7:45 pm
EVENING
PANEL | 7:45 pm - 9:00
pm | Moderator: John Mashey, Sensei Partners
Panelists
Chris Rowen, CEO, Tensilica
Larry Mitage, CTO, Stellcom
Jim Turley, JimTurley.com
Nick Tredennick, Dynamic Silicon
Embedded Systems Software : Visions of
the Future
Tuesday, August 20
SESSION
6 | Potpourri | 8:30 am
- 10:00 am | Chair: Mike Flynn
• The Atheros Chipset for 108 Mb/s
Multi-Mode Wireless LANs
- Bill McFarland, Atheros Comm.
• PipeRench: Power & Performance Evaluation of a Programmable
Pipelined Datapath
- Benjamin A. Levine, Herman H.Schmit, CMU
• GeForce4
- Henry Moretson, John Montrym, Nvidia Corp.
BREAK
| 10:00 am - 10:30 am
KEYNOTE
| Tom Edwards, NASA | 10:30 am - 11:20 am
Incredible Challenges of the Air Traffic Control System
SESSION
7 | Digital Signal Processors
| 11:20 am - 12:20 pm | Chair: John Kubiatowicz
• A
New Distributed DSP Architecture Based on the Intel IXS
- Ernest Tsui, Jumar Ganapathy, T. Chun, A. Dagan, I. Hirsh, H. Honary,
R. Nicholis, L. Snyder, K. Sundstrom, Intel
• VASA: Single-chip MPEG-2 422P@HL CODEC LSI w/Multi-chip Config.
for Large Scale Processing Beyond HDTV Level
- Jiro Naganuma, Hiroe Iwasaki, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome,
Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo
Ikeda, and Makoto Endo, NTT Cyber Space Laboratories, NTT Corporation
LUNCH
| 12:20 pm - 1:30 pm
SESSION
8 | Switches | 1:30 pm
- 2:30 pm | Chair: Howard Sachs
•
Delivering On The Promise of Asynchronous Circuit Design
- Andrew Lines, Fulcrum Micro
• A Scalable Switch Fabric to Multi-Terabit: Architecture and Challenges
- Francois Le Maut, Gilles Garcia, IBM
BREAK
| 2:30 pm - 3:00 pm
SESSION
9 | Systems on Chip II
| 3:00 pm - 4:30 pm | Chair: Pradeep Dubey
•
FirePath
- Sophie Wilson, Rich Porter, Broadcom
• Broadcom Calisto: A Multi-Channel Multi-Service Communication
Platform
- John Nickolls, L. J. Madar III, Scott Johnson, Viresh Rustagi, Ken Unger,
Mustafiz Choudhury, Broadcom
• BCM1101 Ethernet IP Phone / Gateway Platform
- Andy Fung, Broadcom
BREAK
| 4:30 pm - 5:00 pm
SESSION
10 | AMD Hammer | 5:00
pm - 6:30 pm | Chair: John Sell
• The AMD x86-64 ISA: Extending the x86 to 64-bits
- Kevin J. McGrath, David Christie, AMD
• The AMD Hammer Processor Core
- Chetana Keltcher, A. Ahmed, M. Clark, H. Gao, K. Goveas, R. Haddad, B.
Holloway, W. Hughes, R. Klass, D. Kroesche, P. Madrid, K. McGrath, T. Tan,
S. White, T. Wood, G. Zurasaki, Jr., AMD
• Hammer Shared Memory Multi Processor Systems
- Ardsher Ahmed, Pat Conway, Bill Hughes, Fred Weber, AMD
CLOSING
REMARKS | 6:30 pm - 6:45 pm
Join
us next year for HOT Chips 15!
Please check the website as early as January 2003 to see what's developing.
Thanks for joining us.
For registration
help, email registration@hotchips.org
or hotchips14@hotmail.com.
For general questions, email info@hotchips.org
Sponsored by the Technical Committee on Microprocessors and Microcomputers
of the IEEE Computer Society
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