| 9:15-9:30am |
Opening Remarks
|
| 9:30-11:30am |
Session One: Cell Processor
Session Chair: Mitsuo Saito
Presentations:
- A Novel SIMD Architecture for the CELL Heterogeneous Chip-Multiprocessor,
IBM
Authors(s): Michael Gschwind, Peter
Hofstee, Brian Flachs, Marty Hopkins, Yukio Watanabe, Takeshi
Yamazaki
- IBM CELL Interconnect Unit, Bus and Memory Controller, IBM
Authors(s): Scott Clark, Kent Haselhorst, Kerry Imming,
John Irish, Dave Krolak, Tolga Ozguner
- Super Companion Chip w/ A/V oriented interface for the CELL
Processor, Toshiba
Authors(s): Takayuki Mihara, Kenichi
Ishii, Naoki Sugawa
- Programming and Performance Evaluation of the CELL Processor,
Toshiba
Authors(s): Ryuji Sakai, Seiji Maeda,
Christopher Crookes, Mitsuru Shimbayashi, Katsuhisa Yano, Tadashi
Nakatani, Hirokuni Yano, Shigehiro Asano, Masaya Kato, Hiroshi
Nozue, Tatsunori Kanai, Tomofumi Shimada, Koichi Awazu
|
| 11:30-11:50am |
Break
|
| 11:50-12:50pm |
Keynote I
Keynote Chair: Pradeep Dubey
Presentation:
- Facing the Hot Chip Challenge (Again)
Authors(s):
William Holt (Vice President and General Manager, Technology and
Manufacturing Group, Intel Corporation)
|
| 12:50-1:50pm |
Lunch
|
| 1:50-3:20pm |
Session Two: Specialized Architectures I
Session Chair: Teresa Meng
Presentations:
- The Magpie: A Low-Power Real-Time Milliflow Aggregation Processor,
Intel
Authors(s):Bapi
Vinnakota
- Barcelona: A Fibre Channel Switch SoC for Enterprise SANs, Cisco
Authors(s): Nital
P. Patwa
- High-Performance Pattern-Matching Engine for Intrusion Detection,
IBM
Authors(s): Jan van Lunteren, Ton
Engbersen
|
| 3:20-4:20pm |
Session Three: Advanced Technology
Session Chair: Forest Baskett
Presentations:
- Photonically Enabled CMOS, Luxtera
Authors(s):
Cary Gunn
- 40-GHz Operation of a Single-flux-quantum (SFQ) Switch Scheduler,
ISTEC
Authors(s):
Y. Kameda, S. Yorozu, Y.Hashimoto, ISTEC
H. Terai, NICT
A. Fujimaki, Nagoya University
N. Yoshikawa, Yokonama National University
|
| 4:20-4:40pm |
Break |
| 4:40-6:40pm |
Session Four: Media Processors
Session Chair: Keith Dieffendorff
Presentations:
- Telairity-1: A Real Time H.264 High Definition Video Architecture,
Telairity
Authors(s):
Richard Dickson
- Next-Generation Audio Engine, Tensilica
Authors(s): Robert
Kennedy
- Nexperia PNX1700 High-Speed Low-Cost Super-Pipelined Media Processor,
Philips
Authors(s):
Luis Lucas
- An Ultra High Performance, Scalable DSP Family for Multimedia,
Cradle
Authors(s): Erik Machnicki
|
| 6:40-7:40pm |
Dinner |
| 7:40-9:00pm |
Panel Discussion: The Next Killer Application
Panel Chair: Howard
Sachs
Panelists: Pradeep Dubey (Intel), Edward Frank (Broadcom),
Ajay Luthra (Motorola), David Kirk (Nvidia), Nick Tredenick
|
