| 9:15-9:30am |
Opening Remarks
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| 9:30-11:00am |
Session One: Video Processing
Session Chair: Howard Sachs, Telairity
Presentations:
- Highly Integrated Nexperia PNX8535 Hybrid Television Processor, Philips Semiconductors
Authors(s): Ben Pronk
- Heterogeneous Multiprocessing for Efficient Multi-Standard High Definition Video Decoding, Philips Semiconductors
Authors(s): Stephane Mutz, Philippe Durieux
- Home entertainment-quality multimedia experience whilst on the move – Philips Nexperia Mobile Multimedia Co-Processor PNX4103, Philips Semiconductors
Authors(s): Marcin Klecha, Ralf Karge, Richard O'Connor
|
| 11:00-11:20am |
Break
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| 11:20am-12:20pm |
Keynote I
Keynote Chair: Pradeep Dubey, Intel
Presentation:
- Cool Codes for Hot Chips
Authors(s): Justin Rattner, Chief Technology Officer & Intel Senior Fellow, Intel
|
| 12:20-1:20pm |
Lunch
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| 1:20-2:20pm |
Session Two: Microprocessors I
Session Chair: Marc Tremblay, Sun Microsystems
Presentations:
- The Low-Power High-Performance Architecture of the PWRficient Processor Family, P.A. Semi
Authors(s): Tse-Yu Yeh
- The Opteron CMP NorthBridge Architecture, Now and in the Future, AMD
Authors(s): Pat Conway, Bill Hughes
|
| 2:20-3:20pm |
Session Three: Memory and Storage
Session Chair: Mitsuo Saito, Toshiba
Presentations:
- Z-RAM Ultra-dense Memory for 90nm and Below, Innovative Silicon
Authors(s): David Fisch, Anant Singh, Greg Popov
- The Ultra Small HDD for the Mobile Applications, Toshiba
Authors(s): Akihiko Takeo, Kazuhito Shimomura, Jun Itoh
|
| 3:20-3:40pm |
Break |
| 3:40-5:10pm |
Session Four: Reconfigurable Computing
Session Chair: John Wawrzynek, UC Berkeley
Presentations:
- Virtex5, the Next Generation 65nm FPGA, Xilinx
Authors(s): Steve Douglass, Peter Alfke, Kees Vissers
- RAMP: Research Accelerator for Multiple Processors
Authors(s): Professor David Patterson (UC Berkeley), Professor Arvind (MIT), Professor Krste Asanovic (MIT), Professor Derek Chiou (UT Austin), Professor James C. Hoe (CMU), Professor Christoforos Kozyrakis (Stanford), Shih-Lien Lu (Intel), Professor Mark Oskin (U Washington), Professor Jan Rabaey (UC Berkeley), and Professor John Wawrzynek (UC Berkeley)
- An Implementation of Hardware Accelerator using Dynamically Reconfigurable Architecture, Toshiba R&D Center
Authors(s): Takashi Yoshikawa, Yutaka Yamada, Shigehiro Asano
|
| 5:10-5:30pm |
Break |
| 5:30-7:00pm |
Session Five: Parallel Processing
Session Chair: John Kubiatowicz, UC Berkeley
Presentations:
- TeraOPS Hardware & Software: A New Massively-Parallel, MIMD Computing Fabric IC, Ambric
Authors(s): Mike Butts, Anthony Mark Jones
- The CA1024: A Fully Programmable System-On-Chip for Cost-Effective HDTV Media Processing, Connex Technology
Authors(s): Gheorghe Stefan, Lazar Bivolarski, Anand Sheel, Bogdan Mitu, Tom Thomson, and Dan Tomescu
- Hardware and Applications of AsAP: An Asynchronous Array of Simple Processors, UC Davis
Authors(s): Bevan Baas (Professor, Electrical and Computer Engineering, UC Davis), Zhiyi Yu, Michael Meeuwsen, Omar Sattari, Ryan Apperson, Eric Work, Jeremy Webb, Michael Lai, Daniel Gurman, Chi Chen, Jason Cheung, Dean Truong, Tinoosh Mohsenin (UC Davis)
|
| 7:00-8:00pm |
Dinner |
| 8:00-9:30pm |
Panel Discussion: Who Owns the Living Room?
Moderator: Jan-Willem van de Waerdt, Philips Semiconductors
Panelists: James Akiyama (Intel), Bob Brummer (Microsoft), Bill Curtis (Dell), Eugene Shteyn (Philips CE), Alan Messer (Samsung), Glen Stone (Sony), Prof. Yamada (Kyushu Institute of Technology)
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