| 8:30-10:30am |
Session Six: Embedded Processors
Session Chair: Chuck Moore, AMD
Presentations:
- ARM996HS: The First Licensable, Clockless 32-bit Processor Core, Handshake Solutions
Authors(s): Arjan Bink (Handshake Solutions), Richard York (ARM Ltd.), Mark de Clercq (Handshake Solutions)
- The MIPS32® 34K™ Processor Cores: Ultimate Design Flexibility for Embedded Applications, MIPS
Authors(s):
Ryan Kinter
- Design of a Reusable 1GHz, Super-scalar ARM Processor, ARM Inc
Authors(s): Stephen Hill
- Towards Optimal Custom Instruction Processors, Imperial College, London
Authors(s): Wayne Luk, Oskar Mencer, Robert G. Dimond, Kubilay Atasu
|
| 10:30-10:50am |
Break
|
| 10:50-11:50am
|
Keynote II
Keynote Chair: Forest Baskett, New Enterprise Associates
Presentation:
- Collaborative Innovation: A New Lever in Information Technology Development
Authors(s): Bernard Meyerson, IBM Fellow; VP Strategic Alliances and Chief Technologist, Meyerson IBM Systems & Technology Group, Development
|
| 11:50am-12:50pm |
Lunch
|
| 12:50-2:20pm |
Session Seven: Novel Silicon Applications
Session Chair: Rajeevan Amirtharajah, UC Davis
Presentations:
- In Silico Vox: Towards Speech Recognition in Silicon, Carnegie Mellon University
Authors(s): Professor Rob A. Rutenbar (ECE & CS), Edward C. Lin, Kai Yu, Tsuhan Chen
- A Novel Processor Architecture for High-Performance Stream Processing, IBM Research, Zurich
Authors(s): Jan van Lunteren
- Micro Manipulator Array for Nano-bioelectrics Era, Toshiba R&D Center
Authors(s): Hideyuki Funaki, Kazuhiro Suzuki, Yujiro Naruse, Kazuhiko Itaya, Shuichi Uchikoga
|
| 2:40-4:10pm |
Session Eight: Communications
Session Chair: Forest Baskett, New Enterprise Associates
Presentations:
- FocalPoint: A Low-Latency, High-Bandwidth Ethernet Switch Chip, Fulcrum Microsystems
Authors(s): Uri Cummings
- SH-MobileG1: A Single-Chip Application and Dual-mode Baseband Processor, Renesas Technology
Authors(s): Masayuki Ito, Takahiro Irita, Eiji Yamamoto, Kunihiko Nishiyama, Takao Koike, Yoshihiko Tsuchihashi, Hiroyuki Asano, Hiroshi Yagi, Saneaki Tamaki, Ken Tatezawa, Toshihiro Hattori, Shinichi Yoshioka (Renesas Technology), and Koji Ohno (NTT DoCoMo)
- APP300 Access Network Processor, Agere Systems
Authors(s):Balakrishnan Sundararaman
|
| 4:10-4:30pm |
Break
|
| 4:30-6:30pm |
Session Nine: Microprocessors II
Session Chair: Alan Smith, UC Berkeley
Presentations:
- TULSA, A Dual P4 Core Large Shared Cache Intel® Xeon™ Processor for the MP Server Market Segment, Intel
Authors(s):Jeffrey D. Gilbert, Stephen H. Hunt, Daniel Gunadi, and Ganapati Srinivasa
- Niagara2: A Highly-Threaded Server-on-A-Chip, Sun
Authors(s): Greg Grohoski
- Blackford: A Dual Processor Chipset for Servers and Workstations, Intel
Authors(s): Kai cheng, Sundaram Chinthamani, Sivakumar Radhakrishnan, Fayé Briggs and Kathy Debnath
- Inside the Core™ Microarchitecture, Intel
Authors(s): Jack Doweck
|
| 6:30-6:45pm |
Closing Remarks
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