| 9:00 - 9:15am |
Opening Remarks
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| 9:15 - 10:45am |
Session One: IBM Power6™
Session Chair: Doug Burger, University of Texas - Austin
Presentations:
- Fault-Tolerant Design of the IBM POWER6™ Microprocessor.
Author(s): Kevin Reick, Pia N. Sanda, Scott Swaney, Jeffrey W. Kellington, Michael Floyd (IBM)
- System Performance Scaling of IBM POWER6™ Based Servers.
Author(s): Jeff Stuechell (IBM)
- The 3rd Generation of IBM's Elastic Interface (EI-3) Implementation of POWER6™.
Author(s): Daniel Dreps (IBM)
|
| 10:45 - 11:15am |
Break
|
| 11:15 am - 12:15pm |
Keynote I
Keynote Chair: Gordon Garb, Sun Microsystems
Presentation:
- Digital Gaia
Author(s): Vernor Vinge, Computer scientist, science-fiction writer, author of True Names and Rainbows End.
|
| 12:15 - 1:15pm |
Lunch
|
| 1:15 - 2:45pm |
Session Two: Multi-Core and Parallelism I
Session Chair: Marc Tremblay, Sun Microsystems
Presentations:
- NVIDIA GeForce 8800™ GPU.
Author(s): Erik Lindholm, Stuart Oberman (NVIDIA)
- NVIDIA GPU Parallel Computing Architecture.
Author(s): John Nickolls (NVIDIA)
- Performance of Non-Graphics Applications on the GeForce 8800™and the CUDA™ Parallel-Programming Environment.
Author(s): Wen-Mei Hwu (UIUC), David Kirk (NVIDIA), Shane Ryoo (UIUC), John A. Stratton (UIUC), Kuangwei Hwang (UIUC)
|
| 2:45 - 3:15pm |
Break
|
| 3:15 - 5:15pm |
Session Three: Multi-Core and Parallelism II
Session Chair: Alan Jay Smith, UC Berkeley
Presentations:
- Radeon R600, a 2nd Generation Unified Shader Architecture.
Author(s): Michael Mantor (AMD)
- Teraflop Prototype Processor with 80 Cores.
Author(s): Yatin Hoskote, Sriram Vangal, Nitin Borkar, Shekhar Borkar (Intel)
- Design and Implementation of the TRIPS Prototype Chip.
Author(s): Madhu Sravana Sibi Govindan, Doug Burger, Steve Keckler (U Texas Austin)
- Tile Processor: Embedded Multicore for Networking and Multimedia.
Author(s): Anant Agarwal, Liewei Bao, John Brown, Bruce Edwards, Matt Mattina, Chyi-Chang Miao, Carl Ramey, David Wentzlaff (Tilera Corporation)
|
| 5:15 - 5:45pm |
Break |
| 5:45 - 7:15pm |
Session Four: Embedded and Video
Session Chair: Jan-Willem Van de Waerdt, NXP
Presentations:
- SH-X3: SuperH Multi-Core for Embedded Systems.
Author(s): Shinichi Shibahara (Renesas), Masashi Takada (Hitachi), Tatsuya Kamei, Kiyoshi Hayase, Yutaka Yoshida, Osamu Nishii, Toshihiro Hattori
(Renesas)
- An HD Image Processor for Low-Cost Entertainment Products.
Author(s): Deepu Talla (Texas Instruments)
- A Professional H.264/AVC CODEC Chip-Set for HDTV Broadcast Infrastructure and High-End Flexible CODEC Systems.
Author(s): Mitsuo Ikeda, Hiroe Iwasaki, Koyo Nitta, Takayuki Onishi, Takeshi Sano, Atsushi Sagata, Yasuyuki Nakajima, Minoru Inamori, Takeshi Yoshitome, Hiroaki Matsuda, Ryuishi Tanida, Atsushi Shimizu,Jiro Naganuma (NTT)
|
| 7:15 - 8:15pm |
Dinner |
| 8:15 - 9:45 |
Panel Discussion: What's Next After CMOS?
Moderator: Norm Jouppi, Hewlett Packard
Panelists:
John Kubiatowicz (UC Berkeley)
Mike Mayberry (Intel)
Mark Horowitz (Stanford University)
Stan Williams (Hewlett Packard)
Ghavam Shahidi (IBM)
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