Date: Tuesday, August 21, 2007
Location: Memorial Auditorium, Stanford University.


Last Updated: July 3, 2007

8:00 - 9:30am Session Five: Technology and Software Directions

Session Chair: Raj Amirtharajah, UC Davis

Presentations:
  • Multi-terabit Switch Fabrics Enabled by Proximity Communication.
    Authors(s): Hans Eberle (Sun)
  • Thyristor RAM: A High-Speed High-Density Embedded Memory.
    Authors(s): Farid Nemati (T-RAM Semiconductor)
  • Raksha: A Flexible Architecture for Software Security.
    Authors(s): Hari Kannan, Michael Dalton, Christos Kozyrakis (Stanford University)
9:30 - 10:30am Session Six: Wireless

Sessoion Chair: Forest Baskett, New Enterprise Associates

Presentation:
  • A 4Gbps Wireless Uncompressed 1080p 60 GHz HD Transceiver.
    Authors(s): Jeff Gilbert (SiBeam)
  • A 2x2 MIMO Baseband for Wireless Local-Area Network (802.11n).
    Authors(s): Jason A. Trachewsky (Broadcom)
10:30 - 11:00am Break
11:00am - 12:00pm

Keynote II: Multicore and Beyond: Evolving the x86 Architecture
Keynote Chair: Chuck Moore, AMD

Presenter: Phil Hester, AMD (CTO)

12:00 - 1:00pm Lunch
1:00 - 1:30pm Special Presentation

Session Chair: John Montrym, NVIDIA

Presentations:
  • Wireless broadband and entrepreneurship in America.
    Authors(s): Reed Hundt (Vice Chair, Frontline Wireless; Former Chair, FCC)
1:30 - 3:00pm Session Seven: Networking

Session Chair: Dileep Bhandarkar, Microsoft

Presentations:
  • Chesapeake: A 50Gbps Network Processor and Traffic Manager.
    Authors(s): Brian Alleyne (Bay Microsystems)
  • A System-on-a-Chip with Integrated Accelerators.
    Authors(s): Rumi Zahir (Intel)
  • Focalpoint II, A Low-Latency, High Bandwidth Switch/Router Chip.
    Authors(s): Uri Cummings, Mike Zeile (Fulcrum Microsystems)
3:00 - 3:20pm Break
3:20 - 4:50pm Session Eight: Mobile PC Processors and Chipsets

Session Chair: Christos Kozyrakis, Stanford University

Presentations:
  • Power Management Features in Penryn 45nm Core2™ Duo.
    Authors(s): Varghese George (Intel)
  • Next Generation Mobile x86 Processor.
    Authors(s): Jonathan Owen (AMD)
  • nForce 680i and 680 Platform Processors.
    Authors(s): Brian Langendorf (NVIDIA)
4:50 - 5:10pm Break
5:10 - 6:10pm Session Nine: Big Iron

Session Chair: John Montrym, NVIDIA

Presentations:
  • VictoriaFalls - Scaling Highly-Threaded Processor Cores.
    Authors(s): Stephen Phillips (Sun)
  • The Next-Generation Mainframe Microprocessor.
    Authors(s): Charles Webb (IBM)
6:10 - 6:15pm Closing Remarks

Copyright© HOT CHIPS, 2007. All rights reserved.
All trademarks property of their owners. Valid HTML & CSS.