HC02 (1990)

General Information

HOT CHIPS 2 (1990)
Date August 20-21, 1990
Place Mayer Theater, Santa Clara University
Program Final Program PDF
Committees Organizing and Program Committees PDF

Conference Day One

Session Monday, August 20, 1990
Opening Remarks
General Chair: Hasan Aikhatib  PDF
Program Co-Chairs: Alan Jay Smith and John Crawford
Session 1
High Performance Processors – I  
Chair: Dave Ditzel
GaAs SPARC RISC Processor, Gary McMillian, Systems & Processes Engineering Corp.Austin, TX. PDF

The SPARC Lighting Processor, Bruce Lightner, Metaflow Technologies, San Diego, CA. PDF

The MIPS R/6000 Microprocessor, George Taylor, MIPS Corporation, Sunnyvale, CA PDF

Session 2
Chair: Alan Jay Smith
The SPEC and Perfect Club Benchmarks: Promises & Limitations, Rafael Saavedra-Barrera, University of California, Berkeley PDF

Performance Characteristics of the i960CA Superscalar Microprocessor, Steven McGeady, lntel Corporation, Santa Clara, CA PDF

Keynote 1
Special Memorial Presentation on Dr. Robert Noyce
Invited Speaker:
 Dr. Gordon Moore, Chairman of the Board, lntel Corp., Santa Clara, CA.
Session 3 
Video and Graphics
Chair: Hasan AlkhatibA Video Compression Chip Set, Peter Ruetz, LSI Logic Corp., Milpitas, CA PDF

C-Cube CL550 Image Coprocessor, Steven Purcell, C-Cube Corporation, San Jose, CA PDF

DVI and i750 Chip Set, Sanjay Vinekar, lntel Corporation, Princeton, NJ PDF

Session 4 
Chair: Theresa MengDense Stack, John Forthun, Dense-Pac Microsystems, Inc., Garden Grove, CA  PDF

Silicon Multichip Modules, Donald Benson, nChip Inc., San Jose, CA  PDF

Session 5 
Floating Point
Chair: Theresa Meng

A 120 MFLOP CMOS Floating Point Unit, Alan Quek, Weitek Corporation, San Jose, CA PDF

A 100MHz Floating Point l lnteger Processor, Gregory Taylor, Bipolar Integrated Technology, Inc., Beaverton, OR PDF

7:30 Banquet
John Doerr, General Partner with Kleiner Perkins
Caufield & Byers

Conference Day Two

Session Tuesday, August 21, 1990
Session 6 
High Performance Microprocessors – II
Chair:  Martin Freeman

96-bit General Purpose IEEE 754 Floating Point Dual
Port Processor
, Terry Schultz, Motorola, Anaheim, CA PDF

A Single Chip Integer VLlW Processor Core, Gerrit Slavenburg, Philips Research, Sunnyvale, CA  PDF

The Clipper Super Scalar CMOS Chip Set, Howard Sachs, lntegraph Corporation, Palo Alto, CA  PDF

Experience with the i860 CPU,John Casey, Hauppauge Corporation, Hauppauge, NY  PDF

Session 7 
Systolic and Arrays 
Chair:  John CrawfordThe Touchstone DELTA Prototype: A 30 Gigaflop Scalable
Parallel Computer
, Justin Rattner and others, lntel Corporation, Aloha, OR  PDF

100 MOP LIW Microprocessor for Multicomputers,Craig Peterson, iWarp Group, lntel Corporation, Aloha, OR PDF

DataWave – a Data Driven Video Signal Array Processor, Ulrich Schmidt, ITT Intermetall, Freiburg, Germany PDF

Session 8 
Routing and Interconnect 
Chair:  Forest Baskett

Caltech Mesh-Routing Chips, Charles Seitz, California Institute of Technology, Pasadena, CA  PDFGet Off the Bus and Call a Taxi, Paul Scott, Advanced Micro Devices, Sunnyvale, CA  PDF

Hot Rod: 1 Gbitlsec. Data Communications, Johnat han Zierk, Gazelle Microcircuits, Inc., Santa Clara, CA PDF

Session 9 
IBM’s New Superscalar RlSC 
Chair:  David PattersonRlSC System/6000 Architecture, Implementation, and Performance,  B. Bakoglu and R. Oehler, IBM Watson Res. Ctr., Yorktown Heights, NYPDF

Compiling for the RISC System/6000 Branch Unlt
, Martin Hopkins, IBM Watson Research Ctr., Yorktown Heights, NY PDF

RlSC System/6000 Floating Point Unit
, Troy N. Hicks, Oscar R. Mitchell, and Richard E. Fry, IBM Advanced
Workstation Div., Austin, TX  PDF
5:45 Closing Remarks